1. Field of the Invention
The present invention relates to a method of testing devices to be measured, and a testing system therefor.
2. Description of the Related Art
A conventional testing system of the above-described type is shown in FIG. 4. A handler 9 is connected to an LSI tester 1. The LSI tester 1 includes a central processing unit (hereinafter referred to as a CPU) 2, a measuring unit 3 for performing measurements on four devices to be measured (hereinafter referred to as devices) 4a, 4b, 4c and 4d, and a storage unit 5. The storage unit 5 includes a program storing portion 6 for storing programs of tests starting with a first test and ending with an Nth test, and testable/non-testable information storing portions 13a, 13b, 13c and 13d for storing testable/non-testable information on the devices 4a, 4b, 4c and 4d. The measuring unit 3 is connected to contactors 8a, 8b, 8c and 8d, which are to be electrically brought into contact with the devices 4a, 4b, 4c and 4d.
The handler 9 is connected to the CPU 2 of the LSI tester 1 via a communication data bus 12. The handler 9 includes a conveying portion 14, and a control device 11 for performing control on the conveying portion 14. The conveying portion 14 is adapted to convey the devices 4a, 4b, 4c and 4d from predetermined waiting positions to the contactors 8a, 8b, 8c and 8d so as to allow the devices to be electrically brought into contact with the corresponding contactors before the test is started. The conveying portion 14 is also adapted to separate the devices 4a, 4b, 4c and 4d from the contactors 8a, 8b, 8c and 8d after the test has been completed. When the test is started, the conveying portion 14 of the handler 9 is activated by the control device 11 to bring the devices 4a, 4b, 4c and 4d into contact with the contactors 8a, 8b, 8c and 8d, respectively. Thereafter, the control device 11 transmits test start instruction data to the CPU 2 of the LSI tester 1. Upon receipt of the test start instruction data, the CPU 2 stores the testable data in the testable/non-testable data storing portions 13a, 13b, 13c and 13d. At the same time, the CPU 2 reads out the program of the first test from the program storing portion 6 of the storing unit 5 and activates the measuring unit 3 according to that program to perform the first test on the four devices 4a, 4b, 4c and 4d in step S1 shown in FIG. 5.
When the first test is completed, the CPU 2 determines on the basis of the results of the test whether the devices 4a, 4b, 4c and 4d are defective products or non-defective products in step S2. If all the devices are non-defective, the CPU 2 reads out the program of the second test from the program storing portion 6 in step S3 to perform the second test. Thereafter, the CPU 2 performs subsequent tests in a similar manner in steps S4 through S7 until the Nth test is completed.
When the Nth test is completed in step S7, the CPU 2 transmits test completion information data to the handler 9. The control device 11 of the handler 9 drives the conveying portion 14 to discharge the devices 4a, 4b, 4c and 4d from the contactors 8a, 8b, 8c and 8d, whereby the first test cycle is completed.
If it is determined in step S2 from the results of the first test that at least one of the four devices 4a, 4b, 4c and 4d is defective, the CPU 2 determines in step S8 whether or not all the devices are defective. If part of the devices are defective, the CPU 2 stores test suspension data in the testable/non-testable data storing portion 13a, 13b, 13c or 13d corresponding to the device the CPU 2 has judged defective in step S9, and then executes the second test in step S3.
Before each test is conducted, the CPU 2 reads out the testable/non-testable data corresponding to the respective devices from the testable/non-testable data storing portions 13a, 13b, 13c and 13d. The CPU 2 does not perform the test on the device in which the test suspension data is stored as the testable/non-testable data. Accordingly, the second test is not conducted on the device whose testable/non-testable data is the test suspension data. If it is determined in step S8 that all the devices are defective, the first test cycle is ended without the subsequent tests from the second to the Nth tests being executed.
If it is determined that at least one of the devices is defective when each test is completed, the CPU 2 similarly performs determination as to whether all the devices are defective and storage of the testable/non-testable data.
When the first test cycle is ended, the conveying portion 14 of the handler 9 brings four new devices to be tested into contact with the contactors 8a, 8b, 8c and 8d, and the control device 11 transmits the test start instruction data to the CPU 2 of the LSI tester 1 so as to allow the second test cycle to be started. The above-described operation continues until a Pth test cycle is completed.
An example of the actual operation will now be described with reference to the timing chart of FIG. 6. First, the devices 4a, 4b, 4c and 4d are electrically brought into contact with the contactors 8a, 8b, 8c and 8d, respectively, and then the first test cycle is executed on these four devices starting with the first test. It is determined from the results of the third test that the device 4b contacting the contactor 8b is defective, and execution of the fourth and subsequent tests on the device 4b is suspended. The device 4b waits for the completion of the first test cycle at the contactor 8b. Similarly, it is determined from the results of the fourth test that the device 4d contacting the contactor 8d is defective, and execution of the fifth and subsequent tests on the device 4d is suspended. The device 4d waits for the completion of the first test cycle at the contactor 8d. Regarding the remaining the devices 4a and 4c, since it is determined that they are non-defective, the test is conducted thereon up to the last (Nth) test.
When the first test cycle is completed, the devices 4a, 4b, 4c and 4d are discharged from the contactors, and new four devices 4e, 4f, 4g and 4h are brought into contact with the contactors 8a, 8b, 8c and 8d. Thereafter, the second test cycle is started. In the example shown in FIG. 6, it is determined from the results of the fourth test that the device 4e is defective. Thus, execution of the fifth and subsequent tests on the device 4e is suspended. The device 4e waits from the completion of the second test cycle at the contactor 8a.
In recent years, there is a tendency that the number of functions and capacity of a device are increased. This increases the number of testing items and the time required for a single test item, thus increasing the time required for the entire test. In a conventional testing system, when it is determined during the test that the device is defective, that defective device waits for the completion of that test cycle at the corresponding contactor, thus reducing the processing ability of the testing system and increasing the testing cost.